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Memory and bus architecture
RM0008
2.3.3
Embedded Flash memory
The high-performance Flash memory module has the following key features:
●
●
Density of up to 512 Kbytes
Memory organization: the Flash memory is organized as a main block and an
information block:
–
–
Main memory block of size:
up to 4 Kb × 64 bits divided into 32 pages of 1 Kbyte each for low-density devices
(see Table 2 )
up to 16 Kb × 64 bits divided into 128 pages of 1 Kbyte each for medium-density
devices (see Table 3 )
up to 64 Kb × 64 bits divided into 256 pages of 2 Kbytes each (see Table 4 ) for
high-density devices
up to 32 Kbit × 64 bits divided into 128 pages of 2 Kbytes each (see Table 5 ) for
connectivity line devices
Information block of size:
2360 × 64 bits for connectivity line devices (see Table 5 )
258 × 64 bits for other devices (see Table 2 , Table 3 and Table 4 )
The Flash memory interface (FLITF) features:
●
●
●
●
Read interface with prefetch buffer (2x64-bit words)
Option byte Loader
Flash Program / Erase operation
Read / Write protection
Table 2.
Flash module organization (low-density devices)
Block
Main memory
Name
Page 0
Page 1
Page 2
Page 3
Page 4
.
.
.
Page 31
System memory
Base addresses
0x0800 0000 - 0x0800 03FF
0x0800 0400 - 0x0800 07FF
0x0800 0800 - 0x0800 0BFF
0x0800 0C00 - 0x0800 0FFF
0x0800 1000 - 0x0800 13FF
.
.
.
0x0800 7C00 - 0x0800 7FFF
0x1FFF F000 - 0x1FFF F7FF
Size (bytes)
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
1 Kbyte
.
.
.
1 Kbyte
2 Kbytes
Information block
44/995
Option Bytes
Doc ID 13902 Rev 9
0x1FFF F800 - 0x1FFF F80F
16
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